1) Assume we have three processes running at the same time as shown in the following table. Each resource only has one instance.
i) Show a possible situation of resource allocation which results in deadlock. Use a resource allocation graph to show the scenario.
ii) To prevent the possibility of any deadlock, you might alter the order of getting resource requests of some process. Describe how and why. You could also use a resource allocation graph to justify the answer.
P1 P2 P3
while (1) { while (1) { While (1)
get(A); get(D); get(C);
get(B); get(E); get(F);
get(C); get(B); get(D);
// critical region // critical region // critical region
// use A, B, C // use D, E, B // use C, F, D
release(A); release(D); release(C);
release(B); release(E); release(F);
release(C); } release(B); } release(D);}
2) Consider the following snapshot of the system, answer the following questions using the banker's algorithm:
i) What is the content of the matrix Need? Is the system in a safe state?
ii) If a request from Process P1 arrives for (0,4,2,0), can the request be granted immediately?
(Please show the middle steps besides final answer)
Process Allocation ABCD Max ABCD Available ABCD
P0 0 0 1 2 0 0 1 2 1 5 2 0
P1 1 0 0 0 1 7 5 0
P2 1 3 5 4 2 3 5 6
P3 0 6 3 2 0 6 5 2
P4 0 0 1 4 0 6 5 6
3) Compare contiguous-memory allocation with pure paging in the following aspects:
i) In support of dynamic memory allocation: most systems allow programs to allocate more memory to its address space during execution. Heap and stack are examples of such allocated memory.
ii) External fragmentation and internal fragmentation.
iii) Ability to share code across processes.
4) Consider a computer system with a 32-bit logical address and 4KB page size. The system supports up to 512MB of physical memory. How many entries are there in a conventional single-level page table? How many entries are there in an inverted page table? What are the page numbers and offsets for the following address references: a) 30000, b) 256, c) 0xbcf034
5) Consider the following C program where M, N, K are predefined constants. Suppose int is 4 bytes. Assume this program is run on a machine with 4KB page size and 32 TLB entries. Firstly, TLB is empty. FIFO is used as the replacement algorithm for TLB.
int X[N];
for (int k = 0; k < K; k++)
for (int i = 0; i < N; i += M)
X[i] = random(); //generate some random number
a) If K is 1, what values of M and N will cause a TLB miss for every access of array X. Explain why.
b) If K is a very large number, what values of M and N will cause TLB miss for every access of array X. Explain why.
6) Assume a logical address space is 1KB, and the page-size is 16 bytes. Suppose no page is in the main memory for this process at first and the pure demand paging is used. present free frame list is {2,5,8,1,...}. The first frame in the free frame list would be used whenever needed. Assume TLB has two entries. Both TLB and page table are empty initially. FIFO is used as TLB replacement algorithm. Assume the following logical address is accessed in order: 0x3d,0x30,0xe5,0x7d, 0x33, 0xef. For each of the following address access:
i) State the physical address which is mapped to it.
ii) Assume it takes 10 ns to access TLB, and 100ns to access memory, and 8ms to handle page fault. How long time it takes to access this address?
7) Suppose there are only 4 page frames in the physical memory, for the following reference string:
1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2, 8.
a) What is minimum number of page faults for the optimal page replacement strategy? Please show how the page is placed and how page faults occur.
b) How many page faults occur using LRU? Please show how the page is placed and how page faults occur.
8) Consider a demand-paging system with the following time-measured utilizations: CPU utilization: 10%, Paging disk: 98%, Other I/O devices: 5%. What does this mean? How to improve CPU utilization. Describe why. List at least 3 possible solutions.