Please show your work, where applicable, as that is the only way I will be able to award partial credit as needed

1. Three data values are consecutively stored in memory, beginning at address 100H (H for Hexadecimal). First is the decimal value 1000, stored as a 16-bit integer, followed by the decimal value 1000 stored as a 32-bit integer, followed by the string "ABC". Fill in the following table, showing how the data is stored in big-endian or little-endian format. Each of your entries in the table should contain a 2-digit hexadecimal representation of a byte.

Memory Address
(hexadecimal) Big-endian Little-endian
100
101
102
103
104
105
106
107
108

2. A given microprocessor has words of 2 bytes. What are the smallest and largest decimal integers that can be represented in the following representations?

Representation Smallest Largest
unsigned
sign-magnitude
1's complement
2's complement
unsigned packed decimal
signed packed decimal

3. Compare zero-, one-, two-, and three- address machines by writing programs to compute
X = (A + B)2/(3C ? D)
for each of the four machines. Do not modify the values of A, B, C, or D. As needed, use a temporary location T to store the intermediate results. Remember that location X is also available for intermediate results. For full credit, do not use any other memory locations. I will give a small bonus if you compute A+B only once for a given machine.
The instructions available for use are as follows (M can be a variable or immediate operand):

0 Address 1 Address 2 Address 3 Address
PUSH M LOAD M MOVE (X?Y) MOVE (X?Y)
POP M STORE M ADD (X?X + Y) ADD (X?Y + Z)
ADD ADD M SUB (X?X - Y) SUB (X?Y - Z)
SUB SUB M MUL (X?X × Y) MUL (X?Y × Z)
MUL MUL M DIV (X?X / Y) DIV (X?Y / Z)
DIV DIV M

Your program (add lines to the table, as needed).

0 Address 1 Address 2 Address 3 Address

4. Convert the following expressions from reverse Polish to infix:
a) CB × AB + /

b) ABCDE / + ? ×


5. Convert the following expressions from infix to reverse Polish:
a) E /[(A+B) × (C-D)]

b) C - D - E - (A - B)

6. Trace the following instructions for the Intel x86 architecture. Fill in values for the 16-bit registers AX, BX, and CX (4 digit hexadecimal values) after each instruction executes. Assume all registers contain 0 when the program begins.
X DW 0ffffh
Y DW 5h
Z DW 2h
start: AX BX CX
MOV AX, [X]
MOV BX, [Y]
MOV CX, [Z]
SUB BX, AX
SUB CX, CX
INC AX
OR AX, 034ah
AND AX, 734bh
SHL AX, 2

7. Consider a processor in which a two-word instruction is stored at location 100 with its address field at location 101 as shown below. The first word of the instruction specifies the operation code and mode; the second word specifies the address part. The values of the program counter (PC register), a general register (R1), the index register (XR), the base register (BR), and certain addresses in memory are as shown below. (Note: all values are in hexadecimal). 

Memory Registers
Address Content Register Content
100 Load to AC opcode; 
mode PC 100
101 600 R1 300
? ? XR 200
200 300 BR 300
? ?
300 700
? ?
400 200
? ?
500 100
? ?
600 400
? ?
702 500
? ?
800 900
? ?
900 800

Evaluate the effective address and the value that is loaded into the AC for the following addressing modes. Note that if the effective address can be either a memory location or a register. 
Addressing Mode Effective address Value of the operand loaded into the AC
a) Immediate 
b) Direct addressing
c) Indirect addressing
d) Register 
e) Register indirect
f) Relative address
g) Base register addressing
h) Indexed addressing