Your task for this project is to design the biasing circuit for a multi-stage BJT amplifier. You are given the circuit configuration, and the types of transistors to use, but not the resistor values. The circuit is below:

In order for the amplifier to work properly and with good power consumption, you need to design the resistors so that the circuit meets the following specifications:

• The current through Q1 should be close to 0.5 mA.

• The current through Q2 should be close to 0.5 mA.

• The current through Q3 should be close to 1.0 mA.

• The voltage at V3 should be close to 0.0V.

• The voltage at V5 should be close to -2.0V.

• The voltage at V7 should be close to 1.0V.
First, start by doing a hand analysis of the circuit, assuming that β=∞ (no base current) and using the standard assumption that the base-emitter junction is at 0.7V when not in cutoff. Use this to get a rough value for the resistors.
Then, you will create the circuit in SPICE and model it:

• For the transistors, use the model statements for the 2N3904 NPN BJT and the 2N3906 PNP BJT given in the sedra_lib.lib file. This file can be downloaded from the textbook's website or the main content page on Blackboard. These are standard discrete transistors that even have a Wikipedia page. Please copy the model statements into your netlist file so that it is self-contained. Make sure you connect the terminals in the right order for each transistor.

• For the resistors, since this is a low-cost amplifier, your final circuit is restricted to only use resistors from the standard list of 5% resistors given in Appendix J.

• Since we are interested in DC voltages and currents, the correct SPICE analysis to run is ".op".

• Get the target voltages and currents as close to the specifications as you can.

Report

On the day the project is due, you must turn in a report in class and email your SPICE netlist file to me. I will run your file and check your circuit's performance. You are only allowed to turn in one file, and it must be the netlist, not a schematic file. Also no zip files and multiple submissions. If you do not email a single netlist file, you will get no credit for the performance section.

The report format and grade breakdown is as follows:

• Cover Page:

• Hand analysis and design of the circuit, with the six resistor values boxed. They should be your "exact" answers and not the 5% restricted values:

• SPICE netlist printout of the final circuit, including the model statement for the transistors:

• Printed or hand drawn schematic of the final circuit, with:
?All elements labeled:
?All values given:
?All nodes labeled as in your Spice netlist:

• Printout of the results of the .op analysis, with the target voltages and currents highlighted or boxed.

• Performance Analysis (each one is all or nothing). If the resistor values are not standard 5% values, there will be no credit for this section:

?Is the current through R2 at 0.5 ± .03 mA?

?Is the voltage at V3 at 0.0 ± 0.3V?

?Is the current through R4 at 0.5 ± .03 mA?

?Is the voltage at V5 at -2 ± 0.3V? 5 Points

?Is the current through R5 at 1.0 ± .03 mA?

?Is the voltage at V7 at 1.0 ± 0.2V?

• Conclusion. Please give an answer to the following questions:

?How good was the hand analysis in determining the appropriate resistor values?

?What do you think introduced more variation into the design, the more accurate transistor models or the restrictions on the resistor values?

?What is the total power consumed by the circuit?