The objective of this exercise is to interface various devices to the computer using DMA synchronization. You may assume the bus bandwidth is at least 8 million bytes/s. For each device you are asked to select the most appropriate DMA mode. Assume the devices support singleaddress DMA. The 16-bit address of the memory buffer used in each case is 0x1234.
Write tape drive Each tape block is 256 bytes. When a tape head is ready, the controller will signal that it is ready to accept all 256 bytes. At this time, the tape interface chip is ready to transfer as fast as possible all 256 bytes from the memory buffer at 0x1234 to the tape.
Sound input The sound waveform buffer is located in memory at 0x1234. Your interface will read the 8-bit ADC 1024 times at 22 kHz and store the data in the buffer. Your software will be smart enough to create two 512-byte buffers out of the 1024 bytes (double buffer) so that it can process one buffer while the A/D data are being stored automatically under DMA control into the other buffer. That is, when the 1024-byte wave buffer has been filled, the DMA system should repeat and fill it up again.
Read hard drive There is a 256-byte buffer at 0x1234 that your DMA system will fill with data from the hard disk. When a hard drive read head is ready, the controller will signal that it has the next byte from the disk. It takes 10 ms for the read head to be ready, then the 256 bytes of data can be transferred from the disk to memory at 2 million bytes/s.
Fill in the following table that specifies the most appropriate mode for each device.
