Revise the Verilog model in Example 8.6 on page 341 to omit the second ADC controller.
Example 8.6
Develop a Verilog model for the embedded system of Example 8.5.
Example 8.5
Show how, in an embedded system using a Gumnut core, the keypad controller of Example 8.3 and two instances of the ADC controller of Example 8.4, the components are interconnected using distributed multiplexers.
Example 8.4
In Section 8.1.1, we described a successive approximation analog-to-digital converter. It produces a binary-coded value representing the input voltage as a proportion of the full-scale reference voltage, Vf. We also mentioned that a sample-and-hold circuit can be used on the analog input if the voltage can change during the conversion process. Design a controller for a successive approximation ADC to connect to the Gumnut processor core. The controller has a control register whose contents govern operation of the converter. Bits 0 and 1 select among four alternate full-scale reference voltages.
When a 1 is written to bit 2, the analog voltage is held and a conversion is started; when a 0 is written to the bit, the analog voltage is tracked. The controller also has a status register and an input data register. Bit 0 of the status register is 1 when a conversion is complete, and 0 otherwise. Other bits of the register are read as 0. The input data register contains the converted data.
Example 8.3
The signals provided by the Gumnut core for connecting to I/O registers are described in the following Verilog module definition:
The output port_adr_o is the port address, port_dat_o is the data written by an out instruction, port_dat_i is the data read by an inp instruction, port_cyc_o and port_stb_o indicate that a port read or write operation is to be performed, port_we_o indicates that the operation is a write, and port_ack_i indicates that the selected port is ready and has acknowledged completion of the read or write operation. Develop a controller for the keypad matrix shown in Figure 8.2, and show how to connect the controller to a Gumnut core. Use output port address 4 for the matrix row output register and input port address 4 for the matrix column input register.
