1) describe the steps involved within the n-well process of CMOS Fabrication with neat diagram.
2) a) Describe the Basic concept of the MOS transistor.
b) Sketch and describe the Enhancement mode of the MOS transistor operation.
3) prepare down the short notes on the following:
a) Threshold Voltage
b) Channel Length Modulation
c) Body effect.
4) Deduce the Pull-up to pull down ratio for an inverter driven by other nmos inverter.
5) Describe the Lambda-based and Micron based Design rule for n-mos transistor.
6) Sketch the Stick Diagram and Layout of the NMOS and CMOS inverter circuits.
7) describe the Static CMOS and Cascaded voltage switch logic with the suitable diagram.
8) Design and describe the implementation of the adder/Subtracter.
9) a) Describe the Syntax of Conditional Statements in Verilog HDL with the help of exs.
b) Describe different attributes of the Switch level modelling.
10) a) describe several types of the Verilog HDL operators with the help of exs.
b) prepare down the Program using the Verilog HDL to implement the full adder circuit.