DIGITAL ELECTRONICS I ASSIGNMENTS

ASSIGNMENT 1

Question one
a) Find the 2's compliment of 1.1011₂.
b) Find the 10's compliment of 23.324₁₀.
c) Convert the decimal number 7563 first to octal and then to binary. )
d) Convert the binary number 1101.0110111 to hexadecimal.
e) Evaluate the function 101.1₂ ÷11.1₂ up to five decimal places in the fraction.

Question Two
a) Add the following BCD numbers 0111 and 1001.
b) Convert 1010.011₂ into a decimal number.
c) Evaluate 94₁₀ + 69₁₀ using 8421 BCD code arithmetic and 29₁₀+39₁₀ using Excess-3 BCD arithmetic.

Question Three
d) Calculate 1410 - 2110 using 2's compliment binary arithmetic.
e) Convert 101102 into Gray code.
f) State and illustrate the two Demorgan's theorems using X and Y variables.
g) Obtain the canonical sum of product of the function F (A, B, C) = A+BC.
h) State two disadvantages of using BCD over simple binary number systems in computers.

ASSIGNMENT 2

Question One
a) Outline the four advantages of using universal gates for implementation of logic function.
b) Obtain minimised Boolean expression for F=ABC + AB'(A'C')' using Boolean identities and realise the minimised expression using NAND gates only.

Question Two
a) The output of the circuit in the block diagram of Figure 1 is equal to the product of a pair of 2-bit numbers X = x₁x₀ and Y = y₁y₀.

Figure 1: Product of two 2-bit numbers.

i. Construct a truth table for the circuit.
ii. Obtain minimised expression for each output using Karnaugh maps.
iii. Implement the circuit using logic gates.

b) Design a combinational circuit that converts BCD to excess-3 code.

ASSIGNMENT 3

Question One
a) Design and implement the simplified Boolean expressions for a two 2-bit word comparator.

b) Enumerate two examples of non-weighted code.

c) Explain:
(i) The reasons why totem-pole output TTL cannot be wire ANDed.

(ii) How the problem in (i) above is overcome when wired-AND is required.

Question Two
a) Explain:
i. Why care should be taken when handling CMOS based logic gates.
ii. The necessary requirements for a CMOS gate to drive a TTL gate.

b) Using a circuit diagram explain the operation of a CMOS transmission gate.

c) State any three characteristics of emitter coupled logic.

ASSIGNMENT 4

Question One

a) Explain the meaning of race around condition in a digital system.

b) With the aid of a diagram describe the operation of an astable multivibrator.

c) Define the following terms with reference to flip flops:

i. Propagation
ii. Maximum frequency

Question Two

a) Explain the operation of a four stage ring counter that uses J-K flip flops. Illustrate your answer using a sequence table and output waveforms for each stage for the first nine clock pulses.

b) State three advantages and three disadvantages of asynchronous counters.

c) State two main shortcomings of the twisted ring counter and their remedies.

ASSIGNMENT 5

Question One
a) With the aid of suitable waveforms explain the following operational characteristics of edge triggered flip flops:

i. Rise and fall time

ii. Set up and hold time

b) State two disadvantages of ripple counters.

c) Design a MOD-9 up counter using negative edge-triggered T-flip flops and sketch the waveforms at the output of each flip flop for the first ten clock pulses.

Question Two
a) State:

i. The basic difference between an encoder and a decoder.
ii. The three reasons for including an enable input in a decoder.

b) The output of a 4-bit gray code shaft encoder is to be applied to a controller that uses a binary code only. Design the decoder required to enable the controller to operate on the encoder output. Implement your circuit using exclusive-OR gates only.