design an incrementer / decrementer circuit. A control input (ud)
to your circuit decides whether to increment or decrement the input value. Your circuit should work
correctly for any input X (0 ≤ X ≤ 5). Available to you are chips with the following contents:
- a chip with 6 NOT gates
- a chip with 4 2-input AND gates
- a chip with 4 2-input NAND gates
- a chip with 4 2-input OR gates
- a chip with 4 2-input NOR gates
- a chip with 4 2-input XOR gates
- a chip with 4 2-input XNOR gates
- a chip with 3 3-input AND gates
- a chip with 3 3-input NAND gates
- a chip with 3 3-input OR gates
- a chip with 3 3-input NOR gates
- a chip with 2 4-input NAND gates
- a chip with 2 4-input NOR gates
- a chip with 1 8-input NAND gate
Each chip costs $0.10, and each logic gate has a propagation delay of 20 ns. Using these chips,
a) Design a circuit that implements the logic circuit using the fewest total number oflogic gates.
b) Design a circuit that implements the logic circuit with the lowest propagation delayfrom input to output.
c) Design a circuit that implements the logic circuit at the lowest cost.