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problem 1:

A) Describe the given terms:

i) VOL(max)
ii) VOH(min)
iii) VIL(max)
iv) VIH(min)

b) Describe with neat diagram interfacing of TTL gate and CMOS gates.

problem 2:

a) Describe the categorization of integrated circuits.
b) Sketch TTL NAND Gate and describe its working.
c) Sketch TTL NOR Gate and describe its working.

problem 3:

a) Sketch CMOS NAND Gate and describe its working.
b) Sketch CMOS NOR Gate and describe its working.

problem 4:

a) What do you mean by transmission gate? Describe with the help of neat diagram.
b) Describe why two totem pole outputs can't be tied together.
c) With neat circuit describe the concept of open collector O/P with pull-up resistor.

problem 5:

a) Design a CMOS transistor circuit which has the functional behavior F(Z) = (A + B)(B + C).
b) Describe sinking current and sourcing current of TTL output? Which of the above parameters decide the fan out and how?

problem 6:

a) Draw the circuit of a Totem-pole TTL NAND gate? What is the main purpose of using a diode at the output stage? Describe its operation and verify the truth table.

b) When do we use open-collector TTL gate?

c) Which is the fastest logic gate and why?

Electrical & Electronics, Engineering

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