1) Describe the major steps involved in the typical n-well CMOS process with suitable diagrams.
2)(i) prepare a detailed notes on BiCMOS technology.
(ii) Compare n-well process and twin – tub process.
3) prepare down the three regions of operation of nMOS transistors. describe the behaviour of the nMOS transistor in the three regions.
4)(i) prepare brief notes on Lambda based design rules.
(ii) What is meant by Latch-up problem? describe how to prevent latch up in CMOS?
5) Describe the various kinds of scaling used in MOS device.
6) Describe the circuits of: (i) Bit serial adder
(ii) Single-bit adder.
7)(i) Describe the structure of a Braun Multiplier.
(ii) Describe the Booth Multiplication algorithm with suitable ex.
8)(i) Describe the structure of a PLA.
(ii) prepare brief notes on memory design.
9) Describe the various data types used in VHDL.
10) prepare down a VHDL program for a 4 bit adder by using:
(i) Behavioral Modeling
(ii) Structural Modeling.