Answer the following problems in detail.
problem 1) prepare down the difference between simulation and synthesis?
problem 2) describe the use of SUBTYPING?
problem 3) Create the use data type DAYS and design it the values: MON, TUE, WED, THU, FRI, SAT and SUN.
problem 4) What do you mean by instantiating a component?
problem 5) What is the prime use if signals? Give appropriate ex.
problem 6) How does procedure differ from functions?
problem 7) Create an architecture block for the 3-input XOR gate and Add a 25ns inertial delay to the XOR assignment statement.
problem 8) prepare a function which returns the sum of two 8-bit words.
problem 9) prepare down difference between stud_logic_vector and std_ulogic_vector?
problem 10) prepare down a statement that will allow a design o access all the contents of IEEE ARITH library.
problem 11) Sketch the schematic diagram of 4-bit full adder and prepare down its structural modelling.