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Consider the parallel form flow graph shown in Figure P6.48

1424_3c04ba43-c245-496d-91c9-866a487141a6.png

(a) Assume that the system is implemented with two's-complement fixed-point arithmetic, and that all products (multiplications by 1 do not introduce noise) are immediately rounded (before any additions are done). Insert round-off noise sources at appropriate locations in the flow graph to model the rounding error. Indicate the size (average power) of each noise source in terms of σ2B, the average power of one (B + 1)-bit rounding operation.

(b) If the products are rounded as described in part (a), the output can be represented as yˆ[n] = y[n] + f [n] where y[n] is the output owing to x[n] acting alone, and f [n] is the total output due to all the noise sources acting independently. Determine the power density spectrum of the output noise

Electrical & Electronics, Engineering

  • Category:- Electrical & Electronics
  • Reference No.:- M91894513

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