Assignment - Theoretical Worksheet
Section 2 (Assessment Criteria 2.1)
1. a) Draw a typical graph showing Silicon diode performance characteristics with
applied voltage on the x axis and diode current on the y axis, including both positive and negative voltages and currents.
b) Draw a typical graph showing Zener diode performance characteristics with applied voltage on the x axis and diode current on the y axis, including both positive and negative voltages and currents.
2. a) With reference to an NPN Transistor connected in common emitter configuration
what is meant by the term DC current gain Beta (3) and show the mathematical relationship between Ib, Ic and Ie?
b) What is meant by the term Alpha (a) with reference to current gain?
c) Define from first principles the relationship between a and 13 using Kirchoff's Current Law applied to the transistor.
d) If an NPN transistor has a DC current gain P of 150, calculate the base current required to give a collector current of 5 mA.
3. a) What is meant by the term, "Field Effect" when referring to a Field Effect
Transistor.
b) Sketch a diagram showing the construction of an N Channel Depletion mode Insulated Gate Field Effect Transistor showing each substrate and connection terminology.
c) Describe using the above diagram the operation of the device.
4. a) Sketch the Schematic diagram of a typical Class A NPN Common Emitter
Amplifier using R1 and R2 as bias components, RL as the load and RE as emitter resistor.
b) Explain the benefit of adding a shunt capacitance CE across RE.
c) Describe what is meant by DC biasing and how this voltage level is protected from voltages in previous and subsequent stages.
d) Show how an applied Sine wave voltage appears at the output after it has passed through the Amplifier stage.
5. a) Explain why Transistor models are needed for circuit analysis.
b) Sketch a typical h parameter model of an NPN transistor connected in common emitter mode
c) Provide a detailed definition of each parameter used in your sketch.
The h parameters of a transistor connected in the above mode are: hie = ikn, hfe = 50, hoe = 100uS, hre = 5 x 10-4
The stage is fed from a voltage source of 10mV with a source resistance of 600.12 and has a load resistance of 4.7kr2.
d) Calculate the Output Voltage
e) Calculate the Output Resistance
6. a) What is meant by voltage regulation in terms of input voltage and output loading?
b) Show how a Zener Diode can be used with only two resistors to provide a stable output reference voltage.
c) Explain with the aid of a diagram how a transistor can be added to improve the performance of the circuit.
7 a) Draw the logic Symbols and Truth Tables for the following:
3 Input NAND Gate
3 Input NOR Gate
3 Input XNOR Gate
b) What is meant by a Boolean Expression and how is this useful in logic design.
c) When analyzing truth tables why is it helpful to be able to count in binary?
d) Now many digital states are possible with a 7 bit binary code.
e) What is the Decimal value of 10101?
f) What is meant by the term combinational logic?
g) Using only NAND gates sketch the equivalent circuit to replace the 3 input NOR gate drawn above. Produce a truth table showing each gate output condition.