Analog Integrated Circuits Assignment

1) Assume the following:

• Iref = 100 uA
• For M1-M7 and M9, assume that Veff = 0.2 V
• Assume that M7 has twice the W/L as M9.
• Lambda=0.2 V^-1 (both for NMOS and PMOS)
• Assume that (R1+R2)>>R_into_source_M8

a) Calculate loop gain (T)

b) Find symbolic expression for Beta = V_in/V_out

c) If Vin is 1.2 V, calculate values for R1 and R2 which results in V_out equal to 1.8V and current through M8 equal to 1 mA.

d) Find closed-loop gain, V_out/V_in, including effects of the loop gain, with the values of R1 and R2 from (c).

e) If the intrinsic gain of each transistor were halved, and nothing in the circuit is redesigned (meaning all W/Ls stay the same), calculate the percent change in the output voltage (i.e., (Xnew-Xold)/Xold x 100%).

f) Calculate V_out, if R1 and R2 increase by 20% each across a particular temperature range.

g) What is the function of this circuit?

2) For the circuit in Fig. 6.2

a) Which terminal should be the inverting terminal for the op-amp (1 or 2)?

b) Find a symbolic expression for closed-loop gain (I_out1/V_ref) if the amplifier differential-mode gain is Adm and the CMRR is >>1. This needs to include the effects of finite loop gain.

c) How is I_out2 related to I_out1 (assume that W/L ratios of M2-M5 are variables)? Is Iout2 regulated through feedback?

d) Assume that V_ref is a band gap voltage which does not change over temperature and assume that Rset changes over temperature with a temperature coefficient equal to α (i.e., R = R_o(T_o) + α(T-T_o)). What is the temperature dependence of Iout2?

e) What is the function of this circuit?

3) (a) Derive expression for loop gain (T)

(b) Derive expression for Beta1 = Vin/Vout1

(c) Derive expression for Beta2 = Vin/Vout2

(d) Derive expression for RoutCL1 = closed-loop output impedance looking into Vout1

(e) Derive expression for RoutCL2 = closed-loop output impedance looking into Vout2

4) Assume you have an oscillator whose output swing is proportional to a bias current as shown in Fig. 6.4. Also, assume that you have a circuit which can generate a DC voltage proportional to the peak AC voltage swing at its input (known as a peak detector), according to Vout = 0.1Vswing.

a) Design/propose a circuit at the transistor level which can set the amplitude to a known value with Vswing = 2V +/- 0.02 V for a 20% change in transistor characteristics (i.e., λ).

Q4. Find Vout/Vin (closed loop) for circuit in Fig. 6.6.