A load capacitor of 0.2 pF is connected to the output of a CMOS inverter. Determine the power dissipated in the CMOS inverter for a switching frequency of 10 MHz, for inverter parameters described in (a) Problem 1 and (b) Problem 2.
Problem 1
(a) A CMOS inverter is biased at VDD = 2.5 V. The transistor parameters are Kn = Kp = 120μA/V2, VTN = 0.4 V, and VTP = -0.4 V. Calculate and plot the current in the transistors as a function of the input voltage for 0 ≤ vI ≤ 2.5 V.
(b) Repeat part (a) for VDD = 1.8 V and 0 ≤ vI ≤ 1.8 V.
Problem 2
The transistor parameters in the CMOS inverter are VTN = 0.35 V, VTP = -0.35 V, 
= 80μA/V2, and 
= 40μA/V2. Let VDD = 1.8 V.
(a) Determine the peak current in the inverter during a switching cycle for (W/L)n = 2 and (W/L)p = 4.
(b) Repeat part (a) for (W/L)n = 2 and (W/L)p = 6.
(c) Repeat part (a) for (W/L)n = (W/L)p = 4.