1. Simplify following functions using Kmap:

a) F(w,x,y,z) = ∑(1,3,5,7), d(2,6,10,14)

b) F(A,B,C,D) = ∑(0,4,12,15), d(2,3,8,14)

c) F(A,B,C,D) = ∏(5,7,8,9,10,11,12,14), d(1,3,13,15)

d) F(A,B,C,D,E) = ∏ (7,9,11,13,15), d(1,3,6,14)

2. Redesign circuit below using just NOR gates:

3. What is the equation for the circuit below (step by step write the equivalent equation in the output of every gate)?

4. Design an 8 bit two's complement generator.

5. Iterative circuit below implements a comparator that compares two binary numbers A= A3A2A1A0 and B = B3B2B1B0 and gives us two outputs x and z that mean like below:

x=1 if A>B
z=1 if B>A

Design and implements the sub block shown in figure (B) and put right value on the inputs x and z of B#3 in figure (A).

6. Use full adder and design a 4 bits add/subtract block that performs A+B when f=0 and A-B when f=1.