You are to design and construct a 3-bit synchronous counter with an enable (EN) input. The counter is to count in the prescribed squence shown below if EN is true at the next active clock transition. But if EN is false at this transition, then the machine does not count, instead, retains its current value. Note that the enable (EN) input must be included in the state table and state diagram. The count sequence is:

..., 000, 001, 011,101,111,010,100,110,000,001

A) Create a Mealy state diagram to visually describe your machine.

B) Using the information from your diagram, create a state table which incluves columns for "D" and "J/K" flip-flop design