1) Specify and describe about the operators in VHDL with the help of an ex.
2) prepare down the notes on following with the help of an ex:
a) Transport delay model
b) Inertial delay model
3) describe the statements which are used in Behavioural modelling in VHDL.
4) Sketch the diagram and prepare down the VHDL code for 4 input Multiplexer.
5) Describe what is operator over loading with the help of an ex.
6) Describe about the Generics by describeing an ex.
7) prepare down the VHDL code for Mealy FSM.
8) prepare a brief note on the following by giving an ex:
a) Package declaration
b) Package body
9) prepare the verilog code for 4 bit Ripple counter.
10) prepare down the verilog code for Ripple carry adder by using the Gate level Modelling.