Task

1. Suppose that a 256M * 128 Memory built using 1024 K *32 RAM Chips and memory is word addressable.

a. How many RAM Chips are necessary?
b. How many RAM Chips are there per memory word?
c. How many address bits are needed for each RAM Chip?
d. How many banks will this memory have?
e. How many address bits are needed for all memory?

2. A digital computer has a memory unit with 48 bits per word. The instruction set consists of 240 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory.

a. How many bits are needed for the opcode?
b. How many bits are needed to specify the register? How many bits are left for the address part of the instruction?
c. What is the largest unsigned binary number that can be accommodated in one word of memory?

3. Consider an instruction Add 1000. Memory contents, Accumulator (AC), and R1 Register contents are depicted in the below figure: (such as memory address 1000 contains a value 1400, memory address 1100 contains a value 400 etc. All the numbers used here are decimals.)

4. Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator (AC) using the following addressing modes:

i) Immediate
ii) Direct
iii) Indirect
iv) Indexed

- Rationale

This assessment task covers topics on CPU operation and Instruction Set Architecture, and has been designed to ensure that you are engaging with the subject content on a regular basis. More specifically it seeks to assess your ability to:

- be able to investigate the internal operation of the Central Processing Unit (CPU) and describe how it is used to execute instructions;

- be able to investigate and describe in detail the essential elements of computer organisation including internal bus, memory, Input/Output ( I/O) organisations and interfacing standards and discuss how these elements function;