TASK

INTRODUCTION

You have completed your engineering apprenticeship and have a position in the design department of your company. You have been asked by your line manager to analyse logic families and to produce combinational and sequential logic circuits.

TASK 1:

a) Using Manufacturer's datasheets complete a table using Nominal values for the following logic families: LS TTL, ALS TTL, CMOS, HCMOS. (Include excerpts from datasheet in appendix)

b) Briefly explain the different types of scales of integration: SSI, MSI, LSI, VLSI. (one sentence each)

c) Briefly explain the different types of programmable devices: PROM, PAL, PLA. (one- two Sentances)

TASK 2:

You are to design a 3-bit counter with outputs Q₀, Q₁, Q₂, where Q₀ is the least significant bit.

The sequence 0, 2, 3, 5, 7, 6, 4, 0, 2 ... is generated:
010  (2)
011  (3)
101  (5)
111  (7)
110  (6)
100  (4)
000  (0)

Title: Digital Electronic Circuits

AIM OF THIS ASSIGNMENT

You will undertake a number of investigative and practical activities designed to develop your understanding of digital electronic circuits.

ASSIGNMENT OBJECTIVES

In this assignment, for L03, you will need to show that you can design, build and test digital electronic circuits.

L03.1 Compare different digital electronic device families

L03.2 Design and construct combinational and sequential digital electronic circuits using logic devices

L03.3 Test digital electronic circuits

TASK 3:

Part -1

Design a circuit using only NAND gates, whose output goes HIGH when its inputs are: A is high and B is low and either input C or input D is also HIGH and make a sketch. Derive a Boolean equation that describes the performance of the required circuit.

Part -2:

Part 2

a) Using a 'Logic Tutor' design and construct the circuit using the output connected to a LED or Logic-probe, and produce a four-variable truth table and apply all combinations of input variables to the circuit and each time note the logical state of the output.

b) Demonstrate and test the circuit operation for your tutor.

Opportunity for distinction

You need to demonstrate that you have completed the assignment without support from your lecturer or peers.

D2

Part 1

Design the circuit. (Use any type of flip-flops eg JK T or D, and any gates) Include truth tables and Karnaugh maps in your answer

Opportunity for merit

Design the circuit using only another type of flip-flop and NAND gates logic. M2 Demonstrate the circuit operation to your tutor.

Opportunity for Distinction

Re-design the circuit with an UP/DOWN counter input, so that the sequence can be reversed. The counter has a single input D, when D is low the counter counts up the sequence, when D is high the counter counts down the sequence.

Use the Mealy model.

Opportunity for merit

Re-design the circuit with an UP/DOWN counter input, so that the sequence can be reversed. The counter has a single input D, when D is low the counter counts up the sequence, when D is high the counter counts down the sequence.

Use the Moore model (This requires outputs to be decoded)

Your answer should include truth tables, Karnaugh maps. M1

Part 2

Using circuit simulation software, draw a circuit diagram from Task 2, Part 1 and simulate its operation.

Your answer should include truth tables, Karnaugh maps and be made using only JK type flips flops. Demonstrate to your tutor that the circuit works using simulation software.

Attachment:- Format and feedback.pdf