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Task A : Sensor Circuit Design

1814_Fig.jpg

The ‘ideal' Operational Amplifier comparator circuit identified above is one which has zero current input and whose output voltage depends upon the relative magnitudes of its input voltages, V+ and V-. Where (for the unipolar operation shown above) :

VA = VDD if V+ > V-

     = 0V if V+ < V-

1) Calculate the potential dividers resistor values R1 and R2 required to switch VA high when the sensor output reaches your particular value of VS (i.e. when V- = VS ). To limit power consumption the potential divider circuit is to take 1 mA.

2) For each resistor, R1 and R2, design circuits to accurately implement them using a maximum of two E12 resistors for each.

Note

i) E12 resistor range is ( or multiples of 10 of ) :

1, 1.2, 1.5, 1.8, 2.2, 2.7, 3.3, 3.9, 4.7, 5.6, 6.8, 8.2, 10

ii) Each resistor can either be a single value, two series resistors or two parallel resistors.

Task B : Logic Design

694_Fig1.jpg

 

For reliability reasons three sensor circuits, as designed in task A, are used. Derive the minimum boolean logic equation for a logic system that will produce a high output when two or more sensor circuits produce a logic high.You may assume that CMOS technology is used and a logic high is 5V and a logic low 0V.

Task C : Load Supply

1823_Fig2.jpg

A microprocessor (µP) takes the logic systems, and other, sensor outputs and is programmed such that an actuator, of your individual impedance RL ohms, is supplied when its output goes high (5V).

Calculate the value of RB necessary to operate the NPN transistor in saturation, stating all assumptions made.

Note :

i) The circuit shown above is commonly used in such applications when the output loads cannot be fed directly by the µP as either the output current required is too high or the load operates off a higher dc voltage (as shown).

ii) For saturation then a general rule of thumb is to set the transistors base current to be 10% of its collector current.

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