Tapped Delay Line with COMPONENT and GENERIC MAP
A tapped delay line is shown in figure 8.10 (Pedroni 2008). Note that all cells are of the same type (M × N shift register followed by a 2 × N multiplexer). There is, however, an interesting particularity: the value of M varies from one cell to another. Design this circuit using COMPONENT to construct the SR and mux cells. Adopt N = 1 and use GENERIC MAP to define the values of M. Compile your code and check whether the number of flip-flops inferred is seven. Also, simulate it to make sure that the correct functionality was attained.
