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Question: Show the schematic diagrams of the cache memory in Problem assuming that the data and tag areas of the cache are built out of 128-byte RAM ICs.

Problem: A computer system has a 64 KB main memory and a 4 KB (data area only) cache. There are 8 bytes/cache line. Determine

(1) the number of comparators needed and

(2) the size of the tag field, for each of the following mapping schemes:

a. Fully associative

b. Direct

c. Four-way set-associative.

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Computer Engineering, Engineering

Category:- Computer Engineering
Reference No.:- M92283397

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