Problem:

Question- Design a virtual memory system for a 16 bit virtual space, to accommodate 1G of physical memory, maximum, and 16G of swap space, maximum. Use 512 byte pages, and a single level page table.

Part 1- Show a diagram, showing the bit path widths, of the VA to PA translation logic.

Part 2- How large are the PTE's so the page table fills a single page?

Part 3 - Show the format of your PTE which should contain:
the physical page frame (if valid)
the swap slot (if valid)

• a valid bit, signifying the page frame data is valid
• a swaped bit, signifying the swap slot data is valid
• an accessed bit (touched) to help with LRU eviction
• a dirty bit which is set on write to the page
• a read-only bit, which when set will fault on write
• a copy-on-write bit, which when set will fault on write

Show the code, demonstrate it works properly and describe what it is doing.