Problem 1:

Using Logicworks, implement a 4-bit counter state machine that begins at 0000 and numerically counts up or down in the 2's complement representation of binary numbers. The count updates upon each positive edge of a clock input signal.

When the counter numerically counts up, the count proceeds as follows: 0000 -> 0001 -> 0010, etc. When the count reaches 0111 (the highest possible value of 7), the count loops around to 1000 (the lowest possible value of -8), and counts up.

When the counter numerically counts down, the count proceeds as follows: 0000 -> 1111 -> 1110 -> 1101, etc. When the count reaches 1000, the count loops around to 0111.

A Binary Switch input is used to specify whether the counter counts up or down.

Use a Programmable Logic Array (PLA) to implement the entire combinational logic. Use a 4-bit register (i.e. Reg-4 component in Logicworks) to hold the states of the state machine.

Show the output of each bit of the counter using the Hex Display component in Logicworks. Submit your truth table(s) along with your state machine implementation on a Logicworks .cct file.

Problem 2:

Using Logicworks, create a logic gate circuit using tri-state buffers that implements a 4x2 MUX. This MUX contains 4 inputs, with 2 bits per input. It contains 1 output, with 2 bits.

Attach input and output ports to the circuit, and package it into a device symbol.

Attach binary switches and probes to verify that the symbol functions correctly. Submit a copy of your device symbol, with attached binary switches/probes, on a .cct file.

Problem 3 (5 points)

Using Logicworks, create a 4x4 MUX, using a "primitive type" (i.e. MUX) device symbol.

Attach Hex Keyboards (wo/STB) and Hex Displays to verify that the device symbol functions correctly.

Submit a copy of your device symbol, with attached Hex Keyboards/Displays, on a .cct file.