Overview

In this assignment you are required to implement pattern shifting on the MXK Seven Segment Displays. The pattern shifting will be implemented with a digital logic circuit using a schematic design. You are only expected to simulate and submit a report; hence, no hardware implementation is required for this assignment.

You are first required to add the 8 digits of your student number and divide the outcome by 10. The remainder of the division, which ranges between '0' and '9', will be the character that you need to display. Your design needs to handle shifting in two directions; left to right and right to left according to the following sequence:

Hence, the display sequence should be (1), (2), (3), (4), (5), (6) and then start again from position (1) and so on. The position change should take place once every half a second. Note that '0' is used in the above figure as an example (remainder = 0).

Software Requirements
Xilinx ISE v10.1 or v13.2

Inputs and Outputs

In addition to the clock(s), the following two inputs should also be implemented:
Reset: if pressed, the circuit will go to the initial state; position (1).

- Pause: if pressed, the circuit will not move to the next state until this input is back to its default value (`false').

There are three sets of outputs, which are:

- d₁, d₂, d₃, d₄, d₆ (anodes to switch between five of the 7-segment displays)

- a, b, c, d, e, f, g (7-segment display outputs)

- R/L (Shifting direction). When going from position (1) towards position (4), the last 7-segment display (the sixth one) needs to show 'r', i.e.,. On the other hand, when going from position (4) towards position (1), the last 7-segment display will show 'L', i.e., . In other words, for the first three positions 'r' will be displayed, and for the last three `L' will be displayed.

Implementation

- The entire digital logic design must be implemented only with schematics.

- You are not permitted to use inbuilt counter symbols in Xilinx -counters and other circuits must be designed from scratch.

- You are allowed to use built-in flip-flops and logic gates.

- The full schematics of your design must be presented in your report.

- You cannot simply copy and reference a circuit out of the text book or other source for this assignment. You must demonstrate the proper design processes for sequential and combinational logic circuits for each part of the digital logic design.