Address Decoding

Most computer memories are composed of a large number different devices that are interconnected to form the whole memory array which is accessed using the address bus. All of the chips are also connected to the data bus. To create a simple memory map, each chip must be allocated a range of memory addresses which are unique. This means that only one chip will respond with data when a particular address is placed on the address bus.

The process that ensures this unique response to a given address is known as address decoding. This may be implemented in a variety of ways. Remember that a memory organisation of 1K x 8 means a chip has 10 address lines an addressing range of $000 to $3FF (1K) and a data size of 1 byte (8 bits).

A small microprocessor system with a 16bit address bus (A0 to A15) has three memory devices, a 4K x 8 ROM and two 2K x 8 RAM chips (RAM1 and RAM2). It is required to locate them starting at addresses 0000 hex, 2000 hex, and 4000 hex respectively. Each chip is activated by a chip enable pin (CE) going high.

Consider the chip address range allocated and the address lines activated within this range. Inspect the MOST SIGNIFICANT BIT hex digit for each and identify how you might use this to drive the Chip Enable (CE) pin to uniquely activate each chip as well as acting as an address line. Design the simplest address decode circuit using the necessary address lines A15 to A12 and any appropriate simple logic gates, to drive the three different chips.