Homework - Digital Logic Circuit and Data Representation
Question 1 - Given the Boolean function:
F(A,B,C,D)=∑m(0,2,3,5,7,8,10,11,13,15)
1. Drive the simplified Boolean function in sum-of-products form by means of a four-variable Karnaugh map.
2. Draw the logic diagram with
- AND-OR gates;
- NAND gates.
Question 2 - Given a JK flip flop, show how can you convert it into a D flip-flop.
Question 3 - Design a priority encoder with three inputs X, Y, Z and three outputs A, B, C. The truth table for the circuit is shown below.
a) Drive the minimized logic equations for A, B, and C (use Karnaugh maps).
b) Draw the logic circuit diagram for A, B, and C.
|
X Y Z
|
A B C
|
|
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
|
0 0 0
0 0 1
0 1 1
0 1 1
1 0 1
1 0 1
1 0 1
1 0 1
|
Question 4 - Given a sequential circuit (shown in the figure below) that has two D flip-flops A and B, two inputs X and Y, and one output Z.
a) Write the logic function for the flip-flops inputs DA and DB, as a function of X, Y, A and B.
b) Write the logic function for the output Z.
c) If the present state of A and B are A = 1 and B = 0, and the circuit inputs are X = 0 and Y = 0.
Then, what will be the next state values for the flip-flops A and B?
What will be the value of output Z, in this case?
Question 5 - The content of a 4-bit register is initially 1011. The register is shifted six times to the right, with the serial input (SI) being 110011. What is the content of the register after each shift? (Fill the table below.)
| |
Q3 Q2 Q1 Q0
|
|
Initial content of register
|
1 0 1 1
|
|
Content after first shift
|
|
|
Content after second shift
|
|
|
Content after third shift
|
|
|
Content after fourth shift
|
|
|
Content after fifth shift
|
|
|
Content after sixth shift
|
|
Question 6 - Construct a 16-to-1 line multiplexer with two 8-to-1 line multiplexers and one 2-to-1 line multiplexer. Use block diagrams for the three multiplexers.
Question 7 - The following memory units are specified by the number of words times the number of bits per word. How many address lines and input-output data lines are needed in each case?
a) 4K x 16
b) 32K x 8
c) 16M x 32
d) 4G x 64
Question 8 - Convert the following (unsigned) binary numbers to decimal. (Note that the numbers have a fractional part):
a) 101110.1
b) 101010.01
c) 100111.101
Question 9 - Convert the following decimal numbers to binary: 133.375. Show the steps of your work.
Question 10 - Convert the BCD (base 16) number FA35D1 to binary (base 2) and octal (base 8). Show the steps of your work.
Question 11 - Add the following numbers in binary using 2's complement to represent negative numbers. Use word length of 6 bits (including sign bit), and show if overflow occurs.
a) 12 + (-5)
b) (-12) + 11
c) 22 + 11
d) (-11) + (-21)
Question 12 - For error detection in a 3-bit data (XYZ):
a) Design an odd parity generator
b) Design an odd parity checker.
Textbook - Computer System Architecture, 3rd Edition, Morris Mano, Prentice Hall, 1992. ISBN-10: 0131755633. ISBN-13: 978-0131755635.