Answer all the problems.
(a) Do following arithmetic operations by using binary signed 2’s complement notation for integers. You might suppose that maximum size of integers is of 10 bits including sign bit. (Note that the numbers given here are in decimal notation)
i) Add – 512 and 198
ii) Subtract 400 from –98
iii) Add 400 and 112
Please indicate overflow if occurs.
(b) Convert hexadecimal number: 21 3A FE into binary, octal and decimal equivalent.
(c) Convert following string into equivalent “UTF 16” code –
“Email addresses always use @ sign”.
Are these codes same as that used in ASCII?
(d) Design two logic circuits. First circuit takes 3 bit input and produces an odd parity bit output of three input bits. Second circuit takes three bit input and parity bit (which is produced as output of circuit 1) and outputs 0 if the odd parity is satisfied, else it outputs 1. Draw truth tables and use K-map to design Boolean expressions for each of the output bits. Draw resulting circuit diagram by using AND – OR – NOT gates.
(e) Design two bit counter (a sequential circuit) which counts as 0, 1, 2, 0, 1, 2... and so on. You must draw state table, state diagram, the k-map for circuit design, logic diagram of the resultant design using D flip-flop.
(f) Design floating point representation of size 24 bits closer to IEEE 754 format. Number should have a 7 bit biased exponent having a bias of 64. You might suppose that mantissa is in normalised form with first bit being the sign bit of mantissa. Represent the number (34.125) 10 using this format .
(a) A RAM has a capacity of 256K × 8.
(i) How many data input and output lines does this RAM required? Describe your answer.
(ii) How many address lines would be required for this RAM? Describe.
(b) A computer have 1024 words RAM with word size of 16 bits and a cache memory of 16 Blocks with block size of 32 bits draw a diagram to demonstrate the address mapping of RAM and Cache, if (i) direct cache mapping is used, and (ii) the two way set associative memory to cache mapping scheme is used.
(c) Compare different Input/output techniques which are used in a general purpose computer. Which I/O technique would be used for each of the following situation? Give justification in support of your answer.
(i) Data input to a chat server
(ii) Copying the data from one disk file to another disk file
(d) Define different terms relating to access of a Magnetic disk. Determine the average disk access time which reads or prepares to a 2048 byte sector. Suppose that the disk rotates at 3000 rpm; each track of the disk has 16 sectors and data transfer rate of the disk is 64 MB/second.
(e) What is the purpose of SCSI? Compare and contrast SCSI with that of IDE? Which of the two is better for a Server? Justify your answer.
(f) Define each of the following term. Describe the major purpose/ use/ advantage.
(ii) Reading from CD-ROM disk
(iii) Raster Display
(iv) Use of colour depths
(v) Scan codes in keyboards
(vi) Resolution of monitor
(a) Suppose that the new machine has been developed. This machine has 64 general purpose registers of 64 bits each. The machine has 2 GB main memory with memory word size of 32 bits. The Instructions of this machine are of one or two memory words. Each instruction should have at most two operand addresses. The machine implements the internal stack on 32 of its registers. Name four addressing modes which should be supported by such a machine. Give justification of the selection of each of the addressing modes.
(b) Suppose a hypothetical machine which has only PC, AC, MAR, IR, DR and Flag registers. Assume that the instruction of this machine has only one operand address (it should be a register operand, except for the load and store instructions that require this operand to be a memory operand). The second operand is supposed to be any one of the register depending on the type of instruction. It has an instruction:
LOAD InsMem // this instruction causes next instruction that is in the memory location pointed to by PC register to get loaded into the IR register. This instruction also uses MAR, DR, PC and IR registers.
prepare and describe the sequence of micro-operations which are required to load and execute the next instruction. Make and state appropriate assumptions, if any.
(d) Describe Control memory Organisation with the help of the diagram. Describe how this control memory might be used to do different instruction cycles.
(e) describe the purpose of pipelining in a processor? Describe with the help of the ex. Draw diagram and describe a four stage instruction pipeline that has the following cycles:
Instruction and address decode
Execute and store results
(f) Suppose that a RISC machine has 128 registers out of which 32 registers are reserved for the Global variables. Suppose that 10 registers are to be used for storing two input parameters, two output parameters and 6 local variables of a single function. Describe with the help of a diagram, how remaining registers could be used as overlapped register windows that might be used for implementing procedure call. Also demonstrate the parameter passing for the subroutine calls.
(a) prepare the program in 8086 assembly Language (with proper comments) to find if the two given strings of length 5 are reverse of each other. You might suppose that both strings are available in the memory. Make appropriate assumptions, if any.
(b) prepare program in 8086 assembly language to convert two digit unpacked BCD number into equivalent ASCII digits and a packed BCD number. The packed BCD number is to be stored in BH register. Your program should print the two ASCII digits. You might suppose that the unpacked BCD numbers are in the AL and BL registers.
(c) prepare simple near procedure in 8086 assembly language which receives one parameter value in AL register from main module and returns sign bit of the input parameter. Make appropriate assumptions, if any.