Suppose a single-level cache having an access time of 2.5 ns, a line size of 64 bytes, and a hit ratio of H 0.95. Main memory utilizes a block transfer capability which has a first word (4 bytes) access time of 50 ns and an access time of 5 ns for each word thereafter.

a) Explain the access time when there is a cache miss? Suppose that the cache waits till the line has been fetched from the main memory and then re-executes for a hit.

b) Consider that increasing the line size to 128 bytes increases the H to 0.97. Explain whether this decrease the average memory access time?