Q1. Describe the instruction cycle. prepare down the RTL statement for each and every sub cycle. How the instruction cycle is to accommodate the interrupt from Input-Output devices?
Q2. prepare down the categorization of instructions of a micro processor. Which kind of instructions makes use of the flag register?
Q3. Describe how cache memory is distinct from the virtual memory. As well discuss different page replacement policies for virtual memory by using appropriate illustrations.
Q4. What do you mean by software polling and hardware polling? Describe.
Q5. Describe the features of the synchronous and asynchronous data transfer schemes.
Q6. With a neat flow chart, describe non-restoring division algorithm.
Q7. Design parallel priority interrupt hardware for a system through eight interrupt sources.