Design a 4-bit register based on four D flip-flops with three inputs I (4-bit), c (2-bit), and clk,

and one output A (4-bit). The register can do four different operations depending on the value

encoded in input c, as follows:

• c = 00. The register keeps the stored value (no change).
• c = 01. The register increments its value in 1, going back to 0 upon overflow.
• c = 10. The register decrements its value in 1, going back to 15 upon underflow.
• c = 11. Parallel load. The register stores the contents given in input I.

The contents of the register can be read at any time asynchronously (i.e., during the entire clock

cycle) at output A. Construct a gate diagram for this circuit, using sets of combinational and

sequential logic blocks presented in class.