A dual processor SMP system includes an L1 data cache for each processor and employs the MESI protocol to maintain cache consistency. Each cache is a 2-way set associative copy-back cache that contains a total of 8192 cache lines each of which is 256 bytes in size. Way0 within each empty set is filled first. A write-allocate policy is used for each cache. One process, P1, runs on the first processor at the same time that another process, P2, runs on the other processor. P1 accesses a variable X with an initial value of 80 that resides in memory at address 0x400804C0. P2 accesses a variable Y with an initial value of 200 that resides in memory at address 0x400804F8.
a) What is meant by a "write-allocate policy"?
b) Into which set within P1's cache will the memory block containing the variable X be loaded?
c) Into which set within P2's cache will the memory block containing the variable Y be loaded?
d) All of the lines in each processor's data cache are initially invalid. The following accesses are made in the order listed; show the MESI state of the affected cache line before and after each reference and explain your answer:
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Reference
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State of P1's cache line before
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State of P1's cache line after
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State of P2's cache line before
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State of P2's cache line after
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P1 reads X
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P2 reads Y
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P1 increments X by 1
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P2 multiplies Y by 2
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P2 increments Y by 3
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P1 decrements Y by 4
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P2 multiplies X by 2
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P1 multiplies X by 2
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