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A bus organized the CPU has 32 registers with 16 bits in each, an ALU and a destination decoder.

a) Specify how many multiplexers are there within the bus, and specify the size of each multiplexer?

b) State the selection inputs that are required if you utilize the MUX A and MUX B system?

c) How many inputs and outputs are there within the decoder?

d) How many inputs and outputs are there within the ALU for data, involving input and output carries.

e) Develop the block diagram for the system.

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Computer Engineering, Engineering

Category:- Computer Engineering
Reference No.:- M9172059

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