(Answered) 1 are there any situations with the mesi cache coherence

Engineering

1. Are there any situations with the MESI cache coherence protocol in which a cache line is present in the local cache but for which a bus transaction is nevertheless needed? If so, explain.

2. Suppose that there are n CPUs on a common bus. The probability that any CPU tries to use the bus in a given cycle is p. What is the chance that

a. The bus is idle (0 requests).

b. Exactly one request is made.

c. More than one request is made.

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